ASIC-System on Chip-VLSI Design: Multiple Voltage ASIC/SoC Designs: Classification

Multi voltage (Vdd) design strategies can be broadly classified as follows:

1) Static Voltage Scaling (SVS)

Different but fixed voltage is applied to different blocks or
subsystems of the SoC design.

2) Multi-level Voltage Scaling (MVS)

The block or subsystem of the ASIC or SoC design is switched between
two or more voltage levels. But for different operating modes limited
number of discrete voltage levels are supported.

3) Dynamic Voltage and Frequency Scaling (DVFS)

Voltage as well as frequency are dynamically varied as per the
different working modes of the design so as to achieve power
efficiency. When high speed of operation is required voltage is
lowered to attain higher speed of operation with the penalty of
increased power consumption.

4) Adaptive voltage Scaling (AVS)

Here voltage is controlled using a control loop. This is an extension of DVFS.

Multiple Voltage Designs: Timing Issues

Multiple Voltage Designs: Power Planning Issues

Low Power Techniques: Multi Voltage (Vdd)