technique. But larger voltage ranges does not improve power
efficiency. Authors in  showed that for sub threshold supply
voltages, leakage energy becomes dominant, making "just in time
completion" energy inefficient. They also showed that extending
voltage range below half Vdd will improve the energy efficiency for
most processor designs while extending this range to sub threshold
operations is beneficial only for specific applications. One of the
important points to be noted from their study is DVFS in sub threshold
voltage range is never energy efficient.
We know that supply voltage can be reduced if frequency of operation
is reduced. If reduction in supply voltage is quadratic then
approximately cubic reduction of power consumption can be achieved.
However, it should be noted that frequency reduction slows the
The above mentioned relation between energy and voltage is not always
true. The authors in  showed that quadratic relationship between
energy and Vdd deviates as Vdd is scaled down into the sub threshold
voltage level. Sub threshold leakage power increases exponentially
with the supply voltage. Since in sub threshold operation the on
current takes the form of sub threshold current delay increases
exponentially with voltage scaling. At very low voltages dynamic power
reduces quadratically. But the leakage energy increases with supply
voltage reduction since leakage energy is linear with the circuit
delay. Hence dynamic and leakage power becomes comparable in
sub threshold voltage region.
Multiple Voltage Design Challenges
Bo Zhai, David Blaauw, Dennis Sylvester, Krisztian Flaunter,
"Theoretical and Practical Limits of Dynamic Voltage Scaling", DAC
2004, June 7-11, 2004, San Diago, California, USA.