AtopTech No More?

EDA giant Synopsys sued AtopTech alleging patent infringement. After loosing battle AtopTech filed for bankruptcy.

ATopTech, Inc. Initiates Voluntary Chapter 11 Bankruptcy Protection Proceeding

It all started very promisingly.
EDA place-and-route startup ATopTech out of the gates with Broadcom win

But Synopsys doesn't like AtopTech using it's flagship PrimeTime report formats (and may be many more than this) in its tools. They decided to discuss the stuff in court and finally Judge/s gave the judgement in favor of Synopsys.
Synopsys, Inc. v. Atoptech, Inc, No. 3:2013cv02965 - Document 874 (N.D. Cal. 2016)

Read above document, it is pretty interesting, you won't find often VLSI in law schools and books, but here it is !

And now AtopTech website also doesn't work ! It shows some "Syntax Error", in typical style of EDA tool. Then how Aprisa can work !!

Thanks for reading !

Update 23rd Feb 2017:
Atoptech website is accessible now.

ATopTech, Inc. Initiates Voluntary Chapter 11 Bankruptcy Protection Proceeding

SNUG India 2015 Paper: Tackling advanced DRCs and DPT violations using In-Design flow

I, along with co-author Ananda Veerasangaiah from Synopsys, presented a paper- "Tackling advanced DRCs and DPT violations using In-Design flow" in recently concluded SNUG India 2015, held at Bangalore. The paper can be downloaded below.

Tackling advanced DRCs and DPT violations using In-Design flow

SNUG India 2015 paper presentation;Photo courtesy: Ananda, Synopsys

Same paper is presented in this article.

Proceedings of SNUG India 2015 can be found in below link:
SNUG India 2015 Proceedings

Tackling advanced DRCs and DPT violations using In-Design flow

ABSTRACT

Sub-nano-meter technology gives more advantages to design community. However along with the advantages it also brings in lot of challenges along with it. one of them is DRC complacence. Starting from 20nm lower Metal layers has to be decomposed into two masks and this requirement gave raise to new set of DRC rules called Double Pattering Rules commonly known as DPT rules. Along with these rules, regular spacing and enclosure rules have increased both in numbers and complexity.
Routers can only get us to a reasonable closure on DRCs and due to complex DRCs and DPT violations, fixing DRC violations left by router is highly time consuming and manual process. DRC error fixing at 20nm and below nodes are very complicated and error prone. Manual fixing of DRCs will impact tape-out schedules. 

In this paper, we will talk about In-Design flow using Syopsys’ IC Validator and IC Compiler. This flow helped us in bringing down the DRC counts in an automated process. IC Validator brings the power of complete sign-off quality results as it takes foundry’s qualified sign-off runset and coupled with automatic DRC and DPT repair flow with IC Compiler. This seamless integration between IC Validator and IC Compiler makes stream-in and stream-out process redundant as this interface works completely inside Milkyway/IC Compiler environment.

With In-Design flow, designer can catch DRCs in IC Compiler environment and fix them without going through much of routing topology changes and with no timing impact. This boosts both productivity and tape-out schedules. In this paper we will be presenting impact of In-Design Auto DRC Repair flow on our designs and scope for improving the flow for increased productivity.

Environmental constraints

14.4. Environmental constraints

Both DRC and optimization constraints follow environmental constraints. Setting up of operating conditions and wire load model falls under environmental constraints.

Timing Constraints

14.3. Timing Constraints

These constraints specify clock related definitions which affect synthesis and timing analysis.

Synopsys Acquires Magma Design Automation

Well...... Finally the predicted is happening ! EDA major Synopsys is acquiring Magma Design Automation.
Here is the press release: Synopsys to Acquire Magma Design Automation

My 3 Day Experience With Synopsys Lynx Design System

Recently I attended Synopsys workshop on Lynx Design System at Bangalore. it was wonderful experience to learn (and forget everything at the end of 3 days session !!!)something new GUI based so called advanced design flow manager. It had everything in its kitty bag. Synopsys calls it as Run time manager, management cockpit and Foundry ready system.

Lynx Design System