9.1. Wire load models for synthesis
Wire
load modeling allows us to estimate the effect of wire length and fanout on the
resistance, capacitance, and area of nets. Synthesizer uses these physical
values to calculate wire delays and circuit speeds. Semiconductor vendors
develop wire load models, based on statistical information specific to the
vendors’ process. The models include coefficients for area, capacitance, and
resistance per unit length, and a fanout-to-length table for estimating net
lengths (the number of fanouts determines a nominal length).