Optimization Methodology

Design Compiler uses cost functions to optimize the design. Design Compiler calculates the cost functions based on the design constraints and DRCs to optimize the design. [1]. Optimization also depends upon the compilation strategy adopted. There are 4 types of compilation strategies recommended by Design Compiler [1] [2]. They are:

1. Top-down hierarchical compile method
2. Time budget compile method
3. Compile-characterize-write script-recompile (CCWSR) method
4. Design budgeting method

In top down hierarchical compile strategy the source is compiled by reading the entire design. Constraints and attributes are applied based on the design specification. Only top level constraints are needed in this method. Even though the design had several sub modules, only one set of constraints are applied. Because of this entire design are optimized yielding better results. This method works well for the design which does not has multiple clocks or generated clocks. To get better results compile_map_effort high can be used. This command enables Design Compiler to maximize its effort to meet the specified constraints. Once the compilation is completed several design related reports can be obtained. Important of them are: report_timing, report_area and report_power.

Reference

[1] Himanshu Bhatnagar, Advanced ASIC chip Syntheis Using Synopsys Design Compiler, Physical Compiler and PrimeTime, Kluwer Academic Publishers, Second edition, 2002
[2] Design Compiler User Guide, Version X-2005.09, September 2005

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