- A 64-bit, 32 Thread Chip Multithreaded Microprocessor
- A 64-bit, 64 Thread Chip Multithreaded Microprocessor
These processors (RTL source files) can be downloaded from OpenSPARC website.
Quoting directly from OpenSPARC website:
"This download area is for hardware design and verification engineers, it includes
* Verilog RTL for OpenSPARC T1 design
* Verification environment for OpenSPARC T1
* Diagnostics tests for OpenSPARC T1
* Scripts and Sun internal tools needed to simulate the design and to do synthesis of the design
* Open source tools needed to simulate the design
* Scripts and documentation to help with FPGA implementation of parts of OpenSPARC T1 design including
SPARC core, Floating point Unit, Cross-bar"
Download OpenSPARC related all source codes, documents, related tools from here.
Well......verification can be carried out with the help of verilog models etc. What about synthesis and other backend process? where to get free timing and physical libraries?
These are common queries we encounter often.
I stumbled across a comany webpage, Nangate, recently which is providing 45nm Open Cell Library !!
Quoting from their website,
"The Nangate 45nm Open Cell Library is an open-source, standard-cell library provided for the purposes of testing and exploring EDA flows.
Nangate has developed and donated this library to Si2.org for open use......."
"The 45nm Open Cell Library contains the following views:
* Liberty (.lib) formatted libraries with CCS Timing, ECSM Timing and NLDM/NLPM data (fast, slow and typical corners)
* Geometric library in Library Exchange Format (LEF)
* Simulation libraries in Verilog and Spice (pre and post parasitic extracted netlists)
* Cell layouts in GDSII
* Library databook in HTML/XML format
* OpenAccess database containing layouts and netlists"
Download Nangate 45nm Open Cell Library from here.
Note: The SPARC processor has several cache memories (nothing but SRAMs in general). Designers have to arrange memory libraries themselves. Memory libraries can also be generated from memory compilers. I personally haven't implemented design flow of the OpenSPARC processor. I even haven't tested the completeness of the Nangate 45nm open cell library. Share your experiences of these open source projects, if anybody has gone through the pain of designing !