- What is the difference between hard macro, firm macro and soft macro?
- What are IPs?
- Hard macro, firm macro and soft macro are all known as IP (Intellectual property). They are optimized for power, area and performance. They can be purchased and used in your ASIC or FPGA design implementation flow. Soft macro is flexible for all type of ASIC implementation. Hard macro can be used in pure ASIC design flow, not in FPGA flow. Before bying any IP it is very important to evaluate its advantages and disadvantages over each other, hardware compatibility such as I/O standards with your design blocks, reusability for other designs.
- Soft macros are in synthesizable RTL.
- Soft macros are more flexible than firm or hard macros.
- Soft macros are not specific to any manufacturing process.
- Soft macros have the disadvantage of being somewhat unpredictable in terms of performance, timing, area, or power.
- Soft macros carry greater IP protection risks because RTL source code is more portable and therefore, less easily protected than either a netlist or physical layout data.
- From the physical design perspective, soft macro is any cell that has been placed and routed in a placement and routing tool such as Astro. (This is the definition given in Astro Rail user manual !)
- Soft macros are editable and can contain standard cells, hard macros, or other soft macros.
- Firm macros are in netlist format.
- Firm macros are optimized for performance/area/power using a specific fabrication technology.
- Firm macros are more flexible and portable than hard macros.
- Firm macros are predictive of performance and area than soft macros.
- Hard macros are generally in the form of hardware IPs (or we termed it as hardwre IPs !).
- Hard macos are targeted for specific IC manufacturing technology.
- Hard macros are block level designs which are silicon tested and proved.
- Hard macros have been optimized for power or area or timing.
- In physical design you can only access pins of hard macros unlike soft macros which allows us to manipulate in different way.
- You have freedom to move, rotate, flip but you can't touch anything inside hard macros.
- Very common example of hard macro is memory. It can be any design which carries dedicated single functionality (in general).. for example it can be a MP4 decoder.
- Be aware of features and characteristics of hard macro before you use it in your design... other than power, timing and area you also should know pin properties like sync pin, I/O standards etc
- LEF, GDS2 file format allows easy usage of macros in different tools.
From the physical design (backend) perspective:
- Hard macro is a block that is generated in a methodology other than place and route (i.e. using full custom design methodology) and is brought into the physical design database (eg. Milkyway in Synopsys; Volcano in Magma) as a GDS2 file.
- Here is one article published in embedded magazine about IPs. Click here to read.
Synthesis and placement of macros in modern SoC designs are challenging. EDA tools employ different algorithms accomplish this task along with the target of power and area. There are several research papers available on these subjects. Some of them can be downloaded from the given link below.
- "Hard Macro Placement in Complex SoC Design" - view and read article from soccentral
- "Hard Macro Placement in Complex SoC Design" - download white paper
IEEE/Univerity research papers
- "Local Search for Final Placement in VLSI Design" - download
- "Consistent Placement of Macro-Blocks Using Floorplanning and standard cell placement" - download
- "A Timing-Driven Soft-Macro Placement And Resynthesis Method In Interaction with Chip Floorplanning" - download