Verilog HDL-Modules
Verilog HDL-Ports
Verilog HDL: Operators, Number Specification, Underscore Characters, Strings, Identifiers and Keywords, Escaped Identifiers
Verilog HDL: Expressions, Operators and Operands
Verilog HDL: Data Types
Verilog HDL: Hardware Description Using Basic Logic Gates
Verilog HDL: Procedural Continuous Assignments
Verilog HDL: Procedural Assignments
Verilog HDL: Procedural Timing Controls
References:
[1]IEEE Std 1364™-2005, IEEE Standard for Verilog® Hardware Description Language By IEEE
[2]Verilog HDL By Samir Palnitkar
Verilog HDL-Ports
Verilog HDL: Operators, Number Specification, Underscore Characters, Strings, Identifiers and Keywords, Escaped Identifiers
Verilog HDL: Expressions, Operators and Operands
Verilog HDL: Data Types
Verilog HDL: Hardware Description Using Basic Logic Gates
Verilog HDL: Procedural Continuous Assignments
Verilog HDL: Procedural Assignments
Verilog HDL: Procedural Timing Controls
References:
[1]IEEE Std 1364™-2005, IEEE Standard for Verilog® Hardware Description Language By IEEE
[2]Verilog HDL By Samir Palnitkar
0 comments:
Post a Comment
Your Comments...